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China revises Regulations for the Protection of Layout Designs of Integrated Circuits
Time:Sept 03 2026

Xiaolei Chen, 12 August 2026, first published by IAM

 

On 3 August 2026, China’s State Council promulgated the revised Regulations for the Protection of Layout Designs of Integrated Circuits, which will take effect on 15 October 2026. This is the first overhaul of the regulations since they were enacted in 2001.

 

Adding 18 articles, the revised regulations introduce substantial changes, including:

 

  • expanding the scope of protection;
  • introducing the good faith principle; and
  • installing the punitive damages regime.

 

Article 3.2 of the revised regulations explicitly expands the scope of protection to cover quantum photonic integrated circuits, bringing the regulation into line with hardware technical advance in the post-Moore era.

 

Article 9 introduces the good-faith principle in registering layout designs of integrated circuits and in asserting exclusive rights over these. Rights holders are banned from abusing the exclusive right in prejudicing the national interest, public interest or other’s legitimate rights. The Anti-Monopoly Law will apply, should the abuse of right leading to the elimination or restriction of competition, thus constitutes a monopolistic act. Article 20 further stipulates that the application for layout-design registration should be based on genuine creation, without engaging in fraudulent practice.

 

The revised regulations use articles 22 to 24 to provide that when applying for the registration of a layout-design, an originality declaration must be submitted. The submitted reproduction or drawing of the layout-design should clearly show the original parts. The originality declaration should specify the design areas, design points and corresponding functions of the original layout-design. Where the layout-design in its entirety is original, the applicant should specify this in the originality declaration.

 

Article 34 provides welcome clarity that the originality declaration could be used to define and explain the original parts of the reproduction or drawing of the layout design. It suggests that the declaration might be allowed in the infringement suit to help interpret the scope of protection of the layout-design at issue, thus alleviating the rights holder’s burden of proof. Where amendments were made by the right holder to the originality declaration in order to facilitate the registration of the layout design, the rationale behind the amendments could be cited as differentiating original design from common knowledge design, should disputes arise.

 

Article 30.2 of the revised regulations opens doors to more revocation actions by allowing both ex officio revocations initiated by the CNIPA and revocations brought by any individual or organisation. Article 31 makes it clear that exclusive rights over a revoked layout design shall be deemed to be non-existent ab initio.

 

Another noteworthy change is the introduction of a procedure to restore lost rights over a layout design (article 33). The party may file, within the prescribed time limit, a restoration request, provided that force majeure or other reasonable causes apply, resulting in missing the deadlines and the loss of rights.

 

Last but not the least, to align with the provisions of the Civil Code, article 46 establishes a punitive damages regime, which allows up to five times the losses, illegal gains or a relevant royalty rate (where the losses or illegal gains are difficult to determine), in serious circumstances. It also draws on the newly amended Trademark Law regarding the compensation awarded by people's courts in cases of infringement, mandating that the expenses incurred by the rights holder in stopping the infringement may be awarded separately, independent of the amount of compensatory damages.

 

The CNIPA is currently soliciting public comments on the draft revisions to the Implementing Rules of the Regulations for the Protection of Layout Designs of Integrated Circuits and the Examination and Enforcement Guidelines on Layout Designs of Integrated Circuits until 3 September 2026. It remains to be seen how the revised regulations will be implemented in practice.